The design allows vastly more transistors to be packed onto a semiconductor chip with reduced energy usage
Next time you’re searching for a place to plug in your phone or laptop while on the go, consider what life would be like if that phone had a week-long battery life. The future may be almost here, thanks to a new semi-conductor designed by IBM and Samsung Electronics. The design uses a new vertical transistor architecture that has the potential to reduce energy usage by 85 percent. Moore’s Law is the principle that the number of transistors that can fit on a chip will double every two years. However, this doubling is rapidly reaching the point where it is no longer physically possible. However, up to now, transistors have been built to lie flat on the surface of the semiconductor, with the electric current flowing laterally, or side-to-side, through them. In contrast, the newly-developed transistors, dubbed Vertical Transport Field Effect Transistors (VTFET), are built perpendicular to the surface of the chip with a vertical, or up-and-down, current flow.
The VTFET design allows more transistors to be packed onto the chips, as well as greater current flow with less energy wasted. Overall, the company says the new design aims to double the performance of the chips compared to traditionally-designed alternatives. It may also offer a pathway that allows a continuation of Moore’s Law.
Dr. Mukesh Khare, Vice President, Hybrid Cloud and Systems, IBM Research, said that the announcement is about, “challenging convention and rethinking how we continue to advance society and deliver new innovations that improve life, business and reduce our environmental impact. Given the constraints the industry is currently facing along multiple fronts, IBM and Samsung are demonstrating our commitment to joint innovation in semiconductor design and a shared pursuit of what we call ‘hard tech.'”
With chips being incorporated into everything from mattresses to mirrors and showers, chips with reduced energy usage are going to be vitally important in making these devices more sustainable and efficient. The VTFET architecture, combined with IBMs new chip design, which packs 50 billion transistors in a space the size of a fingernail, could well make this possible.